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rms_norm_gated_silu_bf16silu_mul_bf16sigmoid_mul_bf16embedding_lookup_bf16partial_rope_qk_bf16argmax_bf16spec_accept_greedy_bf16nexn2_lin_split_qkv_broadcast_bf16nexn2_split_q_gate_bf16nexn2_router_topk_bf16router_topk_bf16moe_weighted_sum_bf16_to_fp32relu2_quantize_fp8_static_bf16(input, scale, out=None)rms_norm_fp16(x, weight, eps=1e-6, out=None)rms_norm_fp16_vec(x, weight, eps=1e-6, out=None)layer_norm_fp16(x, weight, bias, eps=1e-6, out=None)layer_norm_fp16_vec(x, weight, bias, eps=1e-6, out=None)layer_norm_quant_fp8_static_fp16(x, weight, bias, scale, eps=1e-6, out=None)layer_norm_fp8_static_fp16_vec(x, weight, bias, scale, eps=1e-6, out=None)rope_rotate_half_fp16_(x, cos, sin)rope_rotate_half_fp16_vec(x, cos, sin)quantize_fp8_static_fp16(x, scale, out=None)quantize_fp8_static_fp16_vec(x, scale, out=None)quantize_fp8_static_bf16(x, scale, out=None)layer_norm_quant_fp8_static_bf16(x, weight, bias, scale, eps=1e-6, out=None)gate_geglu_merged_quant_fp8_static_bf16(merged, scale, out=None)residual_add_fp16_(residual, x)residual_add_fp16_vec(residual, x)repeat_interleave_heads_fp16(x, repeat, out=None)gpu_repeat_interleave_heads_vec(x, repeat, out=None)relu2_quantize_fp8_static_bf16 fuses ReLU-squared and static-scale FP8 E4M3
quantization. Pass out= for static-buffer and CUDA Graph runtimes.router_topk_bf16 is the model-neutral alias for the existing deterministic
router contract. moe_weighted_sum_bf16_to_fp32 gathers routed expert rows and
accumulates router-weighted BF16 expert outputs into an FP32 token output.out= buffers and the in-place
entries are suitable for CUDA Graph replay._vec names are additive aliases for runtime capability
discovery. They dispatch the exact same native CUDA implementations as the
established model-neutral names; callers can bind either surface without a
performance or numerical change.quantize_fp8_static_bf16 computes
clamp(x / scale, -448, 448) into FP8 E4M3. The LayerNorm entry performs FP32
statistics, rounds the normalized value to BF16, and emits FP8 without an
intermediate tensor. The merged GeGLU entry splits (M,2H) into gate/up,
applies the native tanh-GELU approximation, multiplies by up, and emits static
FP8 (M,H). All three require SM110 and support static out= buffers.python transformer-fused-ops/tests/test_transformer_fused_ops.py --backend source --mode fulltorch.compile(fullgraph=True) and CUDA Graph replay gates.