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mlx-lm and verified running on Apple Silicon.*.mlp.router.gate)mlx-community/Hy3-preview-4bit.1from mlx_lm.convert import convert
2
3def hy3_predicate(path, module, config=None):
4 if path.endswith("mlp.router.gate"):
5 return {"group_size": 64, "bits": 8}
6 return {"group_size": 64, "bits": 4}
7
8convert(
9 hf_path="tencent/Hy3",
10 mlx_path="Hy3-4bit",
11 quantize=True, q_bits=4, q_group_size=64, q_mode="affine",
12 quant_predicate=hy3_predicate,
13)hy_v3 architecture support comes from mlx-lm PR #1211.jaccl RDMA backend (MLX_METAL_FAST_SYNCH=1). Single-stream decode.| Metric | Value |
|---|---|
| Decode (generation) | 36.91 tok/s |
| Prompt (prefill) | 8.6 tok/s |
| Peak memory / node | 84.4 GB |
| Backend | jaccl (RDMA), pipeline-parallel |
ring/TCP backend trips the macOS Metal command-buffer watchdog on the cross-node fence wait; RDMA (jaccl) is required for stable single-stream decode.tencent/Hy3, Apache-2.0)