4-bit Sklansky parallel prefix adder. Achieves minimum possible depth (log₂n) at the cost of maximum fanout. The fastest parallel prefix adder when fanout is not a constraint.
This associative operation enables the parallel prefix tree construction.
Truth Table (Examples)
A
B
Cin
S
Cout
Decimal
0000
0000
0
0000
0
0+0=0
0001
0001
0
0010
0
1+1=2
0110
0011
0
1001
0
6+3=9
1001
0111
0
0000
1
9+7=16
1111
1111
1
1111
1
15+15+1=31
Threshold Implementation
Generate (AND gate)
G_i: w[A_i]=1.0, w[B_i]=1.0, bias=-2.0
fires when A_i + B_i >= 2 (both are 1)
Propagate (XOR via OR-NAND-AND)
P_i = (A_i OR B_i) AND (A_i NAND B_i)
OR: w=[1,1], b=-1 → fires if either input is 1
NAND: w=[-1,-1], b=1 → fires unless both inputs are 1
AND: w=[1,1], b=-2 → fires if both OR and NAND fire
